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File name: | 3c505_Etherlink_Plus_Developers_Guide_May86.pdf [preview 3c505 Etherlink Plus Developers Guide May86] |
Size: | 3590 kB |
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Mfg: | 3Com |
Model: | 3c505 Etherlink Plus Developers Guide May86 🔎 |
Original: | 3c505 Etherlink Plus Developers Guide May86 🔎 |
Descr: | 3Com 3c505_Etherlink_Plus_Developers_Guide_May86.pdf |
Group: | Electronics > Other |
Uploaded: | 29-01-2020 |
User: | Anonymous |
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Extracted files: | 1 | |
File name 3c505_Etherlink_Plus_Developers_Guide_May86.pdf E THE R LIN X P L U S 3 C 5 0 5 D EVE LOP E R I S G U IDE Revision 3.0 3Com Corporation May 2.1, 1986 PREFACE This document is intended for use by sophisticated software engineers who will either be writing application software that will talk to the 3C505, or software that will actually reside on the card. The user is expected to have a strong background in microcomputer systems. It is recommended that the user browse through the Intel 80186 Data Sheet and the Intel Lan Components User's Manual before beginning (they are available through Intel). The manual is divided into the following chapters: CH1~PTER 1 HARDWARE EXTERNAL REFERENCE SPECIFICATION (ERS) Provides a description of the 3C505 architecture, system resources and functional operation. CHAPTER 2 HARDWARE INTERFACE SPECIFICATION Describes the programmable registers used to control, configure, and communicate with the 3C505. CHAPTER 3 COMMAND INTERFACE SPECIFICATION Describes the function and use of the command level interface software supplied with the card. APPENDIX A 80186 PERIPHERAL CONTROL BLOCK PROGRAMMING Provides the values used in the 3C505 firmware to configure the 80186 internal resources. APPENDIX B 82586 CONFIGURATION Provides the values used by the 3C505 firmware to configure the 82586. APPENDIX C 3CSOS DIAGNOSTIC Describes the operation of the 3C505 diagnostic utility program. 3D DEBUGGER Describes a host program that uses a special debug mode of the 3C505 to assist in debugging programs running on the card. APPENDIX E 3C50S DEVELOPER'S SOFTWARE DISKETTE Describes the contents of the diskette that accompanies the developer's kit. APPENDIX F REVISION 2.0 ROM Describes changes made in Revision 2.0 ROM code. APPENDIX G REVISION 3.0 ROM Describes changes made in Revision 3.0 ROM code. TABLE OF CONTENTS Page # CHAPTER 1 - HARDWARE EXTERNAL REFERENCE SPECIFICATION 1.0 Introduction 1 1.1 Resources 1 1.2 Architecture 1 1.3 Address Maps 3 1.3.1 Adapter I/O map 3 1.3.2 Adapter memory map 3 1.3.3 Host I/O map 3 1.4 80186 Microprocessor 4 1.5 82586 Ethernet Coprocessor 4 1.6 Network Interface |
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